• DocumentCode
    1082972
  • Title

    Parallel feedback network architecture for blind source separation

  • Author

    Jeong, H. ; Kim, Y.

  • Author_Institution
    Dept. of Electron. & Electr. Eng., POSTECH, Pohang Kyungbuk, South Korea
  • Volume
    40
  • Issue
    17
  • fYear
    2004
  • Firstpage
    1089
  • Lastpage
    1091
  • Abstract
    The existing blind source separation (BSS) architectures are more often than not based upon software and thus not suitable for direct implementation on hardware. Presented is a parallel algorithm and architecture for a BSS based on parallel architecture. The hardware testing performed with real world speech signals is found to be viable in terms of real time computation and separation ability.
  • Keywords
    blind source separation; circuit feedback; parallel algorithms; parallel architectures; speech processing; VHDL code; blind source separation; hardware testing; parallel algorithm; parallel feedback network architecture; real time computation; signal-noise ratio; speech signals;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20045070
  • Filename
    1327543