• DocumentCode
    1084987
  • Title

    Generalized algorithms for systematic synthesis of Branch-and-Combine clock networks for meshes, tori, and hypercubes

  • Author

    Umasankar, Maheshwar ; El-Amawy, Ahmed

  • Author_Institution
    Alliance Semicond. Corp., San Jose, CA, USA
  • Volume
    6
  • Issue
    12
  • fYear
    1995
  • fDate
    12/1/1995 12:00:00 AM
  • Firstpage
    1283
  • Lastpage
    1300
  • Abstract
    Branch-and-Combine (BaC) clock distribution has recently been introduced. The most interesting aspect of the new scheme is its ability to bound skew by a constant irrespective of network size. In this paper, we introduce algorithms for systematic synthesis of BaC networks for clocking meshes, tori, and hypercubes of different dimensionalities. For meshes our approach relies on filing techniques. We start with the identification of basic proper tiles satisfying certain criteria. We define a set of valid transformations on tiles. By appropriately applying a sequence of transformations on a basic proper tile, one could synthesize a valid BaC network. We formally introduce methods and procedures for applying the above steps to systematically construct different valid BaC network designs for 2D and 3D meshes. To construct BaC networks for clocking hypercubes of any dimensionality we describe a formal methodology. In this case, we utilize an approach called replication which is based on constructing larger hypercube clocking networks from smaller ones. We combine the techniques for 2D, 3D meshes with replication techniques to formulate a methodology applicable to meshes and tori of dimensionality greater than three. We provide proofs of correctness for the algorithms we introduce. Besides, we formally define an optimality criterion based on link costs which is utilized to check the optimality of the synthesized network designs. In the case of meshes, we show that the majority of synthesized networks are optimal with respect to our defined criterion. For those suboptimal networks, we describe a procedure for identifying and removing unnecessary (redundant) links. The procedure is guaranteed to optimize the network without changing its behavioral parameters
  • Keywords
    hypercube networks; multiprocessing programs; parallel algorithms; parallel architectures; program verification; basic proper tiles; branch-and-combine clock distribution; branch-and-combine clock networks; correctness; formal methodology; hypercube clocking networks; hypercubes; replication; systematic synthesis; Application software; Clocks; Concurrent computing; Control systems; Cost function; Helium; Hypercubes; Network synthesis; Parallel processing; Tiles;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/71.476169
  • Filename
    476169