DocumentCode
1086262
Title
Improving Timing Offset Estimation by Alias Sampling
Author
Jenq, Yih-Chyun
Author_Institution
Dept. of Electr. & Comput. Eng., Portland State Univ., Portland, OR
Volume
57
Issue
7
fYear
2008
fDate
7/1/2008 12:00:00 AM
Firstpage
1376
Lastpage
1378
Abstract
In a previous paper, we reported an algorithm that can be used to accurately measure sampling timing errors in a data acquisition system that encounters nonuniform sampling. In this paper, we first study the sensitivity of the algorithm to input frequency inaccuracy. We then investigate the dependency of the accuracy of the algorithm on the number of effective bits in an analog-to-digital (A/D) converter. It is observed that, if the initial timing error is "reasonably large," then the residual timing error decreases by one order of magnitude for each increase in the number of effective bits by four. Finally, we propose the use of "alias sampling" to "magnify" the timing error so that the algorithm\´s sensitivity is greatly improved and can be used to estimate a much smaller timing offset with only a modest number of effective bits in the A/D converter.
Keywords
analogue-digital conversion; data acquisition; sampling methods; A-D converter; alias sampling; analog-to-digital converter; data acquisition system; nonuniform sampling; sampling timing errors measurement; timing offset estimation; Alias sampling; nonuniform sampling; residual timing error; sensitivity; timing offset estimation;
fLanguage
English
Journal_Title
Instrumentation and Measurement, IEEE Transactions on
Publisher
ieee
ISSN
0018-9456
Type
jour
DOI
10.1109/TIM.2008.917184
Filename
4459447
Link To Document