DocumentCode
1087901
Title
Elimination of limit cycles in floating-point implementations of direct-form recursive digital filters
Author
Laakso, T. ; Zeng, B. ; Hartimo, I. ; Neuvo, Y.
Author_Institution
NOKIA Res. Center, Helsinki, Finland
Volume
41
Issue
4
fYear
1994
fDate
4/1/1994 12:00:00 AM
Firstpage
308
Lastpage
313
Abstract
This paper focuses on the limit cycle analysis of floating-point implementations of direct form recursive digital filters. A sufficient criterion for the absence of zero-input limit cycles is derived for a direct-form implementation with a single quantizer in the recursive loop. Both the unlimited exponent range (UER) limit cycles and those due to exponent underflow are considered. The main result of the paper is that the limit cycle behaviour of the filter is directly related to the maximum gain of the recursive loop. The higher the recursive loop gain, the longer mantissa wordlength is required to eliminate the possible large-amplitude UER limit cycles. Also the root-mean-square (RMS) bound for the underflow limit cycles is directly proportional to the recursive loop gain. The error feedback technique can be used to reduce the peak gain and thus to save bits in the mantissa wordlength in critical applications, as shown by examples
Keywords
digital arithmetic; digital filters; limit cycles; RMS bound; direct-form; error feedback technique; exponent underflow; floating-point implementations; limit cycles; mantissa wordlength; maximum gain; recursive digital filters; recursive loop gain; root-mean-square bound; single quantizer; unlimited exponent range; Digital filters; Dynamic range; Feedback; Fixed-point arithmetic; Floating-point arithmetic; Laboratories; Limit-cycles; Signal processing; Signal to noise ratio; Silicon;
fLanguage
English
Journal_Title
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7130
Type
jour
DOI
10.1109/82.285707
Filename
285707
Link To Document