• DocumentCode
    1089852
  • Title

    Power-efficient gate control of synchronous boost converters with high output voltage

  • Author

    Woo, Y.-J. ; Cho, Gyu-Hyeong ; Cho, G.-H.

  • Author_Institution
    Div. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon
  • Volume
    43
  • Issue
    3
  • fYear
    2007
  • Firstpage
    156
  • Lastpage
    157
  • Abstract
    A half output voltage swing gate driving scheme is presented for high voltage single chip DC/DC converters. In the proposed scheme the energy for the PMOS gate drive is reused for the NMOS gate drive, and switching loss is reduced. A high speed and area-efficient high voltage level shifter is also realised. A prototype is implemented using a 0.5 mum 40 V power BiCMOS process
  • Keywords
    BiCMOS integrated circuits; DC-DC power convertors; high-speed integrated circuits; power integrated circuits; 0.5 micron; 40 V; DC/DC converters; NMOS gate drive; PMOS gate drive; area-efficient level shifter; high speed level shifter; high voltage level shifter; high voltage single chip; power BiCMOS process; power-efficient gate control; swing gate driving scheme; synchronous boost converters;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • Filename
    4087787