DocumentCode
1089873
Title
Hole current in dual dielectric under positive gate voltage
Author
Yau, L.D. ; Liou, F.-T. ; Chen, S.
Author_Institution
Intel Corporation, Aloha, OR
Volume
4
Issue
8
fYear
1983
fDate
8/1/1983 12:00:00 AM
Firstpage
261
Lastpage
263
Abstract
n-channel dual-dielectric transistors with SiO2 :Si3 N4 gate insulators were fabricated with and without boron implant in the channel. Under positive gate voltage stress, electrons can enter the insulator from the silicon, and holes can enter the silicon from the insulator. The electrons and holes were measured by the technique described by Ginovker et al.[1]. For oxides thicker than 30 Å, it is always observed that the silicon hole current is 3-4 orders of magnitude below the silicon electron current. The physical origin of this hole current is shown to be field-enhanced excitation of electrons from the valence band to the conduction band in the silicon prior to entering the insulator, and is not due to the holes from the insulator entering the silicon.
Keywords
Artificial intelligence; Boron; Charge carrier processes; Dielectrics and electrical insulation; Helium; Implants; Metal-insulator structures; Silicon; Stress; Voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1983.25726
Filename
1483470
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