DocumentCode
1090637
Title
Epitaxial layer enhancement of n-well guard rings for CMOS circuits
Author
Troutman, R.R.
Author_Institution
IBM General Technology Division, Burlington, VT
Volume
4
Issue
12
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
438
Lastpage
440
Abstract
n-well guard rings have long been used for isolating potential electron injectors to avoid latch-up of CMOS circuits. Such guard rings are shown to be orders of magnitude more efficient for CMOS fabricated in an epitaxial layer (epi-CMOS) than for bulk (non-epi) CMOS. The maximum escape probability in epi-CMOS measures 3.9E-06 while for bulk CMOS it is 1.8E-02.
Keywords
Boosting; CMOS process; Circuits; Current measurement; Doping; Electrons; Epitaxial layers; Lighting control; Silicon; Substrates;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1983.25794
Filename
1483538
Link To Document