Passive reduction algorithm for RLC interconnect circuits with embedded state-space systems (PRESS)

With the increasing operating frequencies and functionality in modern designs, the resulting size of circuit equations of high-frequency interconnect and microwave subnetworks are becoming large. Model-order reduction-based algorithms were recently suggested to handle the solution complexity of such circuits. The major objectives in state-of-the-art model-reduction algorithms are: 1) achieving accurate and compact models; 2) numerically stable and efficient generation of models; and 3) preservation of system properties such as passivity. Algorithms such as PRIMA generate guaranteed passive reduced-order models for large interconnect circuits described by RLC type of circuits. However, with the diverse technologies and complex geometries, it is becoming prevalent to describe some of the embedded linear modules in terms of state-space equations. In this paper, we show how to extend the scope of PRIMA-type first-level reduction algorithms for simultaneous reduction of combined circuits containing both RLC interconnects and embedded modules described by general passive state-space equations, while preserving the passivity of the resulting reduced-order model. Necessary formulation, proof of macromodel passivity, and validation examples are given.