DocumentCode
1096451
Title
CMOS two-quadrant multiplier using transistor triode regime
Author
Filanovsky, I.M. ; Baltes, H.
Author_Institution
Dept. of Electr. Eng., Alberta Univ., Edmonton, Alta., Canada
Volume
27
Issue
5
fYear
1992
fDate
5/1/1992 12:00:00 AM
Firstpage
831
Lastpage
833
Abstract
A CMOS two-quadrant multiplier using a differential pair with controlled current tail is described. A bias circuit with output current proportional to the square of input voltage provides the tail current for the pair. This bias circuit includes an operational amplifier and two nested transistors. One of these transistors is in pinch-off, the other in the triode region of operation. The transistor mismatch and body effect influence are evaluated. The circuit is verified experimentally
Keywords
CMOS integrated circuits; analogue computer circuits; multiplying circuits; CMOS; bias circuit; body effect; controlled current tail; differential pair; nested transistors; operational amplifier; pinchoff region; transistor mismatch; transistor triode regime; two-quadrant multiplier; Circuits; Filters; Input variables; Laboratories; Operational amplifiers; Resistors; Tail; Threshold voltage; Transconductance; Voltage control;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.133175
Filename
133175
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