• DocumentCode
    109749
  • Title

    Fine-Grained Critical Path Analysis and Optimization for Area-Time Efficient Realization of Multiple Constant Multiplications

  • Author

    Xin Lou ; Ya Jun Yu ; Meher, Pramod Kumar

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    62
  • Issue
    3
  • fYear
    2015
  • fDate
    Mar-15
  • Firstpage
    863
  • Lastpage
    872
  • Abstract
    In this paper, critical path of multiple constant multiplication (MCM) block is analyzed precisely and optimized for high-speed and low-complexity implementation. A delay model based on signal propagation path is proposed for more precise estimation of critical path delay of MCM blocks than the conventional adder depth and the number of cascaded full adders. A dual objective configuration optimization (DOCO) algorithm is developed to optimize the shift-add network configuration to derive high-speed and low-complexity implementation of the MCM block for a given fundamental set along with a corresponding additional fundamental set. A genetic algorithm (GA)-based technique is further proposed to search for optimum additional fundamentals. In the evolution process of GA, the DOCO is applied to each searched additional fundamental set to optimize the configuration of the corresponding shift-add network. Experimental results show that the proposed GA-based technique reduces the critical path delay, area, power consumption, area delay product and power delay product by 32.8%, 4.2%, 5.8%, 38.3%, and 41.0%, respectively, over other existing optimization methods.
  • Keywords
    adders; delay circuits; genetic algorithms; multiplying circuits; DOCO algorithm; GA-based technique; MCM block; area delay product; cascaded full adders; critical path delay; delay model; dual objective configuration optimization; fine-grained critical path analysis; genetic algorithm; multiple constant multiplication block; power consumption; power delay product; shift-add network configuration; signal propagation path; Adders; Algorithm design and analysis; Complexity theory; Delays; Hardware; Optimization; Propagation delay; Critical path; genetic algorithm; high-speed; multiple constant multiplication (MCM);
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2014.2377412
  • Filename
    6998063