• DocumentCode
    1100423
  • Title

    Processor Design in 3D Die-Stacking Technologies

  • Author

    Loh, Gabriel H. ; Xie, Yuan ; Black, Bryan

  • Author_Institution
    Georgia Institute of Technology
  • Volume
    27
  • Issue
    3
  • fYear
    2007
  • Firstpage
    31
  • Lastpage
    48
  • Abstract
    Three-dimensional integration is an emerging fabrication technology that vertically stacks multiple integrated chips. The benefits include an increase in device density; much greater flexibility in routing signals, power, and clock; the ability to integrate disparate technologies; and the potential for new 3D circuit and microarchitecture organizations. This article provides a technical introduction to the technology and its impact on processor design. Although our discussions here primarily focus on high-performance processor design, most of the observations and conclusions apply to other microprocessor market segments.
  • Keywords
    integrated circuit design; microprocessor chips; stacking; 3D die-stacking technologies; multiple integrated chips; processor design; three-dimensional integration; Chemical technology; Fabrication; Integrated circuit interconnections; Integrated circuit technology; Microprocessors; Process design; Silicon; Stacking; Topology; Wafer bonding; 3D integration; computer systems organization; processor architectures;
  • fLanguage
    English
  • Journal_Title
    Micro, IEEE
  • Publisher
    ieee
  • ISSN
    0272-1732
  • Type

    jour

  • DOI
    10.1109/MM.2007.59
  • Filename
    4292055