DocumentCode
1102287
Title
Composite step-graded collector of InP/InGaAs/lnP DHBT for minimised carrier blocking
Author
Chor, E.F. ; Peng, C.J.
Author_Institution
Dept. of Electr. Eng., Nat. Univ. of Singapore, Singapore
Volume
32
Issue
15
fYear
1996
fDate
7/18/1996 12:00:00 AM
Firstpage
1409
Lastpage
1410
Abstract
A composite step-graded collector of InP/InGaAs/InP DHBT has been investigated for minimised carrier blocking. The optimised collector has the following sub-layers: a 100 Å n- InGaAs layer; three 200 Å n- InGaAsP layers; and a 100 Å, n=3×1017 cm-3 InP layer, and the rest are n - InP. The InGaAsP layers should be chosen to give approximately equal band offset at the heterointerfaces
Keywords
III-V semiconductors; carrier mobility; gallium arsenide; heterojunction bipolar transistors; indium compounds; semiconductor heterojunctions; 100 angstrom; 200 angstrom; DHBT; InP-InGaAs-InP; composite step-graded collector; double heterojunction; equal band offset; heterointerfaces; minimised carrier blocking;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19960889
Filename
511151
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