Deep cryogenic noise and electrical characterization of the complementary heterojunction field-effect transistor (CHFET)

This paper discusses a characterization at 4 K of the complementary heterojunction field-effect transistor (CHFET), to examine its suitability for deep cryogenic (<10 K) readout electronics applications. The CHFET is a GaAs-based transistor analogous in structure and operation to silicon CMOS. The electrical properties including the gate leakage current, subthreshold transconductance, and input-referred noise voltage were examined. It is shown that both n-channel and p-channel CHFET´s are fully functional at 4 K, with no anomalous behavior, such as hysteresis or kinks. Complementary circuit designs are possible, and a simple CHFET-based multiplexed op-amp is presented and characterized at 4 K. The noise and gate leakage current of the CHFET are presently several orders of magnitude too large for readout applications, however. The input-referred noise is on the order of 1 μV/√(Hz) at 100 Hz for a 50×50 μm n-channel CHFET. The gate current is strongly dependent on the doping at the gate edge, and is on the order of 10^-14 A for a 10×10 μm ² n-channel CHFET with light gate-edge region doping