DocumentCode
1107082
Title
Designing Sets of Fault-Detection Tests ror Combinational Logic Circuits
Author
Kohavi, Zvi ; Spires, Dewayne A.
Author_Institution
IEEE
Issue
12
fYear
1971
Firstpage
1463
Lastpage
1469
Abstract
This paper is concerned with the problem of determining, by means of terminal experiments, whether a given combinational switching circuit operates correctly or is impaired by some malfunction. We shall be primarily concerned with permanent faults due to component failures. It is assumed that other methods will be employed to protect the circuit against the effects of transient faults. A procedure is presented for the detection of failures in combinational switching circuits. The procedure provides minimal sets of tests for two-level circuits and nearly minimal sets of tests for most multilevel circuits.
Keywords
Combinational logic, diagnosis, equivalent normal form, fault detection, path sensitization, testing.; Circuit faults; Circuit testing; Combinational circuits; Diodes; Electrical fault detection; Fault detection; Fault diagnosis; Feedback circuits; Logic testing; Switching circuits; Combinational logic, diagnosis, equivalent normal form, fault detection, path sensitization, testing.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1971.223158
Filename
1671751
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