DocumentCode
1110619
Title
New GaAs-MMIC process technology using low-temperature deposited SrTiO3 thin film capacitors
Author
Nishitsuji, M. ; Tamura, A. ; Yahata, K. ; Shibuya, Megumi ; Kitagawa, Makoto ; Hirao, Takami
Author_Institution
Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Osaka
Volume
30
Issue
13
fYear
1994
fDate
6/23/1994 12:00:00 AM
Firstpage
1045
Lastpage
1046
Abstract
The authors have developed a new GaAs-MMIC process technology using low-temperature deposited SrTiO3 thin film capacitors which were combined with WSi-gate selfaligned FETs. The SrTiO3 films were successfully deposited at 200°C by the RF magnetron sputtering method without degrading the FET characteristics. By integrating these on-chip SrTiO3 bypass capacitors onto the GaAs IC, the parasitic inductance from the source to ground interconnection was successfully reduced and an enhanced gain characteristic was obtained for a self-biased amplifier circuit
Keywords
MMIC; amplifiers; field effect integrated circuits; gallium arsenide; sputter deposition; thin film capacitors; 200 C; GaAs; GaAs-MMIC process technology; RF magnetron sputtering method; SrTiO3; SrTiO3 thin film capacitors; WSi-gate selfaligned FETs; enhanced gain characteristic; low-temperature deposited; on-chip SrTiO3 bypass capacitors; parasitic inductance; self-biased amplifier circuit; source to ground interconnection;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19940718
Filename
294788
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