On Error Control in Sequential Machines

It is shown that if a machine M con be mapped into a simpler machine M´ by a homomorphism, then an error correcting/detecting code can be applied to the states of M such that the parity check bits are generated independently of the information bits that form the state assignment of M. If such a homomorphism does not exist, it is shown how to produce one by altering M if M consists entirely of loops as is the case with a digital computer. The method presented here is a generalization to sequential machines of the separate adder and checker concept used for checking addition. Methods of coding are given. Application to computers is given.