DocumentCode
1112311
Title
Multiple Operand Addition and Multiplication
Author
Singh, Shanker ; Waxman, Ronald
Author_Institution
Systems Development Laboratories, IBM Corporation
Issue
2
fYear
1973
Firstpage
113
Lastpage
120
Abstract
The problem of adding k n-bit numbers, where k ≥ 3 is considered. A novel scheme for adding such k numbers is described. Applying the bit-partitioning technique so that each partition contains m bits of each of these k numbers, where m=[log2(k-1)] is an integer ≥ log2(k-1), the final sum can be obtained in m+1 addition cycles.
Keywords
Binary arithmetic, binary multiplier, bit partitioning, multioperand adder, partial product array, pipelining.; Adders; Circuits; Digital arithmetic; Hardware; Large scale integration; Partitioning algorithms; Pipeline processing; Registers; Binary arithmetic, binary multiplier, bit partitioning, multioperand adder, partial product array, pipelining.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1973.223670
Filename
1672263
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