DocumentCode
1115446
Title
A Generalized Pipeline Array
Author
Kamal, A.K. ; Singh, Harpreet ; Agrawal, D.P.
Author_Institution
Department of Electronics and Communication Engineering, University of Roorkee
Issue
5
fYear
1974
fDate
5/1/1974 12:00:00 AM
Firstpage
533
Lastpage
536
Abstract
A generalized pipeline cellular array has been proposed which can perform all the basic operations such as multiplication, division, squaring, and square rooting. The different modes of operation are controlled by a single control line. An expression for time delay has been obtained. Further, it has been shown that these arithmetic operations can be overlapped in the pipe in any desired sequence, and thus significant speed improvement can be achieved. The array is fully iterative and hence is suitable for large-scale integration (LSI).
Keywords
Adder/subtractor cell, division, fully iterative, latch circuits, multiplication, pipeline, squares, square-root, 2´s complement.; Arithmetic; Clocks; Communication system control; Costs; Delay effects; Large scale integration; Latches; Logic arrays; Pipeline processing; Pulse circuits; Adder/subtractor cell, division, fully iterative, latch circuits, multiplication, pipeline, squares, square-root, 2´s complement.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1974.223977
Filename
1672570
Link To Document