Effects of Film Stress Modulation Using TiN Metal Gate on Stress Engineering and Its Impact on Device Characteristics in Metal Gate/High- $k$ Dielectric SOI FinFETs

In this letter, the effects of TiN-induced strain engineering on device characteristics for a metal gate/high-k silicon-on-insulator fin-shaped field-effect transistors were studied. From a convergent-beam electron-diffraction analysis and simulation study, a 3-nm TiN electrode was found to lead to significantly higher tensile stress on the Si substrate than a 20-nm TiN electrode. This high stress-induced fast bulk carrier generation results in the transient current-time characteristics. Therefore, 3- and 20-nm TiN electrodes are the excellent choice for nMOSFETs and pMOSFETs, respectively, which is from the standpoint of strain engineering, threshold voltage (V_th), and performance. Due to the metal-induced strain, I_dsat improvements of 15% and 12% for nMOSFETs and pMOSFETs, respectively, were achieved.