Cellular Logic Array for High-Speed Signed Binary Number Multiplication

A new high-speed cellular logic array for multiplication of signed binary numbers is described. It uses a four-bit arithmetic logic unit MC10181 to achieve high speed and to reduce the number of interconnections. A multiplication algorithm which implements simultaneous multiplication by two digits of the multiplier results in a cellular logic array achieving high speed and involving less equipment. ment. A high-speed 4 X 2 multiplier chip is proposed.