10-MHz 64-bit error-tolerant signature recognition circuit

Author

O´Leary, Paul L. ; Orben, Hans Josef

Author_Institution

Austria Microsyst. Inst., Unterpremstaetten, Austria

Volume

23

Issue

3

fYear

1988

fDate

6/1/1988 12:00:00 AM

Firstpage

625

Lastpage

629

Abstract

A circuit which identifies a 64-bit synchronization word in a serial incoming data stream is discussed. The signature is identified when the incoming data stream matches a previously known and stored signature. It is also possible to program the number of bit errors permissible for recognition of the signature. The circuit was fabricated in a 1.5- mu m CMOS technology for use in a D2MAC television decoder. The circuit operates at data rates up to 20 MHz and covers an area of 1.4*0.1 mm/sup 2/. The possible applications in image recognition and string identification in text are presented.<>

Keywords

CMOS integrated circuits; integrated logic circuits; signal processing; video signals; 1.5 micron; 10 to 20 MHz; 64-bit error-tolerant signature recognition circuit; 64-bit synchronization word; CMOS technology; D2MAC television decoder; applications; data rates; image recognition; number of bit errors permissible; serial incoming data stream; stored signature; string identification in text; CMOS technology; Circuits; Decoding; Delay; Differential equations; Image recognition; Pipeline processing; Registers; Switches; TV;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.299

Filename

299