Design of a Real-Time FPGA-Based Data Acquisition Architecture for the LabPET II: An APD-Based Scanner Dedicated to Small Animal PET Imaging

The LabPET II detector block was designed to achieve submillimeter spatial resolution in small animal PET imaging. Each detection block consists of two arrays of 4 × 8 avalanche photodiodes (APD) individually coupled to an 8 × 8 scintillator array, to form 64 independent detectors with parallel readout channels. This new detection block entails an eightfold increase in pixel density compared to the LabPET I. A 64-channel mixed-signal application-specific integrated circuit (ASIC) was designed to extract relevant PET data in real time from the LabPET II detection blocks. In order to interface the ASICs forming the PET camera with the storage units, a real-time FPGA-based digital data acquisition (DAQ) system was designed. The DAQ system allows event harvesting, processing and transmission to a host computer for data storage as well as system programming and calibration. Real-time event processing embedded in the DAQ includes time trigger, energy computation using a time-over-threshold (TOT) conversion scheme, timing corrections, and event sorting trees. In the standard DAQ mode, a real-time coincidence engine analyzes events and only keeps relevant information to minimize data throughput and post-acquisition data processing. The architecture consists of three FPGA-based electronic layers wired through gigabit links: a Front-End layer extracts time and energy along with the pixel address, a custom Hub layer chronologically sorts incoming events, and a Coincidence engine matches coincident events and computes an estimate of the random events rate. Every FPGA in the different layers is accessible through an Ethernet link. The real-time digital architecture sustains the required throughput of ~ 111 million events/s for a ~ 37000-channel scanner configuration.