DocumentCode
1125270
Title
Challenges in barrier and seed layers characterization of Cu technology IC devices
Author
Li, Kun ; Er, Eddie ; Yeow, Timothy ; Tang, Dong
Author_Institution
Chartered Semicond. Manuf. Ltd.
Volume
6
Issue
2
fYear
2006
fDate
6/1/2006 12:00:00 AM
Firstpage
283
Lastpage
287
Abstract
Ta barrier and Cu seed layer characterization becomes extremely challenging with devices scaling down into the 130- and 90-nm regime. This paper aims at providing a feasible solution for this challenge from both sample preparation and transmission electron microscopy imaging perspectives. Different sample preparation and imaging techniques are compared here
Keywords
copper; integrated circuit testing; tantalum; transmission electron microscopy; 130 nm; 90 nm; Cu; Ta; copper seed layer characterization; cylindrical effect; integrated circuit devices; sample preparation; tantalum barrier characterization; transmission electron microscopy imaging; Atherosclerosis; Chemical vapor deposition; Copper; Dielectrics; Erbium; Integrated circuit technology; Lenses; Thickness measurement; Transmission electron microscopy; Tunneling; Cylindrical effect; integrated circuits (IC); sample preparations; transmission electron microscopy (TEM);
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2006.876584
Filename
1673721
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