• DocumentCode
    1128864
  • Title

    Recursive TMR: scaling fault tolerance in the nanoscale era

  • Author

    Thaker, D.D. ; Amirtharajah, R. ; Impens, F. ; Chuang, I.L. ; Chong, F.T.

  • Author_Institution
    Dept. of Comput. Sci., California Univ., Davis, CA, USA
  • Volume
    22
  • Issue
    4
  • fYear
    2005
  • Firstpage
    298
  • Lastpage
    305
  • Abstract
    As process technologies decrease in feature size, designers face new reliability challenges. Feature sizes of less than 0.25 μm increase the risk of noise-related faults that result from electrical disturbances in the logic values held in circuits and on wires. Such transient faults can cause single-bit upsets, which in turn can introduce a logical fault in the circuit. In this article, we classify the sources of noise that can be scalably corrected (where using RTMR is beneficial as device size scales) with recursive triple modular redundancy (RTMR) and those that cannot. In particular, we have found that single-event upsets caused by energetic particles can be effectively compensated with RTMR. Flicker noise in devices, however, is not competitively correctable. In other words, noise models show that an RTMR circuit composed of small, less reliable devices does not always compete in speed and area with an equivalent circuit composed of large more reliable devices. In light of this finding, we discuss microarchitectural design options for mixing large and small devices to trade off reliability, speed, and area.
  • Keywords
    fault tolerance; integrated circuit reliability; integrated circuit testing; logic design; logic gates; logic testing; nanotechnology; redundancy; RTMR; circuit reliability; fault tolerance scaling; logic faults; microarchitectural design; nanotechnology; recursive triple modular redundancy; reliable devices; transient faults; 1f noise; Circuit faults; Circuit noise; Equivalent circuits; Fault tolerance; Logic circuits; Logic devices; Microarchitecture; Redundancy; Wires; Emerging technologies; Error-checking; Fault tolerance; Redundant design;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2005.93
  • Filename
    1492289