• DocumentCode
    1132515
  • Title

    Simplifying sequential circuit test generation

  • Author

    Sheu, Meng-Lieh ; Lee, Chung Len

  • Volume
    11
  • Issue
    3
  • fYear
    1994
  • Firstpage
    28
  • Keywords
    Circuit faults; Circuit synthesis; Circuit testing; Controllability; Degradation; Design for testability; Flip-flops; Hardware; Sequential analysis; Sequential circuits;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.1994.303845
  • Filename
    303845