DocumentCode
1132872
Title
Processor Testability and Design Consequences
Author
Robach, C. ; Saucier, G. ; Lebrun, J.
Author_Institution
ENSIMAG, University of Grenoble
Issue
6
fYear
1976
fDate
6/1/1976 12:00:00 AM
Firstpage
645
Lastpage
652
Abstract
Our purpose is to define a methodology for writing (micro) programs to test CPU´s for which no or few test facilities are available.
Keywords
Hardcore, microdiagnosis, processor design, testability, test microprograms.; Circuit faults; Circuit testing; Fault detection; Fault location; Hardware; Humans; Process design; System testing; Test facilities; Writing; Hardcore, microdiagnosis, processor design, testability, test microprograms.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1976.1674666
Filename
1674666
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