DocumentCode
1134401
Title
Shift Register Binary Rate Multipliers
Author
Ninke, W.H. ; Ritchie, G.R.
Author_Institution
Bell Laboratories
Issue
3
fYear
1977
fDate
3/1/1977 12:00:00 AM
Firstpage
276
Lastpage
278
Abstract
Novel implementations of a binary rate multiplier (BRM) circuit are described. These BRM´s, which use the input data word to load patterns into shift registers, are capable of working at higher speed than a conventional circuit, and should be more suitable for silicon integration. Long input data words can be accommodated with a long shift register or by interconnecting several short registers.
Keywords
Binary rate multipliers (BRM´s), code conversion, logic design, shift registers, vector generation.; Clocks; Counting circuits; Delta modulation; Digital signal processing; Integrated circuit interconnections; Logic design; Pulse modulation; Shift registers; Signal generators; Silicon; Binary rate multipliers (BRM´s), code conversion, logic design, shift registers, vector generation.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1977.1674819
Filename
1674819
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