DocumentCode
1135681
Title
Topology for hybrid multilevel inverter
Author
Lai, Y.S. ; Shyu, F.-S.
Author_Institution
Dept. of Electr. Eng., Nat. Taipei Univ. of Technol., Taiwan
Volume
149
Issue
6
fYear
2002
fDate
11/1/2002 12:00:00 AM
Firstpage
449
Lastpage
458
Abstract
A new topology for a hybrid multilevel inverter is presented, which significantly increases the level number of the output waveform and thereby dramatically reduces the low-order harmonics and total harmonic distortion. To the best of the authors´ knowledge, the presented topology has the greatest level number for a given number of stages. Moreover, the stage with higher DC link voltage has lower switching frequency; and thereby reduces the switching losses. Comparison of the results of various multilevel inverters is investigated to reflect the merits of the presented topology. The details of the PWM control using the harmonic elimination technique for the hybrid inverter are presented and confirmed by both simulation and experimental results.
Keywords
PWM invertors; bridge circuits; harmonic distortion; harmonics suppression; losses; power conversion harmonics; switching circuits; PWM control; cascade H-bridge multilevel inverter; harmonic elimination technique; higher DC link voltage; hybrid inverter; hybrid multilevel inverter topology; low-order harmonics reduction; lower switching frequency; multilevel inverters; output waveform; switching losses reduction; total harmonic distortion reduction;
fLanguage
English
Journal_Title
Electric Power Applications, IEE Proceedings -
Publisher
iet
ISSN
1350-2352
Type
jour
DOI
10.1049/ip-epa:20020480
Filename
1176556
Link To Document