• DocumentCode
    1141560
  • Title

    Techniques for energy-efficient communication pipeline design

  • Author

    Qu, Gang ; Potkonjak, Miodrag

  • Author_Institution
    Electr. & Comput. Eng. Dept., Univ. of Maryland, College Park, MD, USA
  • Volume
    10
  • Issue
    5
  • fYear
    2002
  • Firstpage
    542
  • Lastpage
    549
  • Abstract
    The performance of many modern computer and communication systems is dictated by the latency of communication pipelines. At the same time, power/energy consumption is often another limiting factor in many portable systems. We address the problem of how to minimize the power consumption in system-level pipelines under latency constraints. In particular, we apply fragmentation technique to achieve parallelism and exploit advantages provided by variable voltage design methodology to optimally select voltage and, therefore, speed of each pipeline stage. We focus our study on the practical case when each pipeline stage operates at a fixed speed. Unlike the conventional pipeline system, where all stages run at the same speed, our system may have different stages running at different speeds to conserve energy while providing guaranteed latency. For a given latency requirement, we find explicit solutions for the most energy efficient fragmentation and and voltage setting. We further study a less practical case when each stage can dynamically change its speed to get further energy saving. We define the problem and transform it to a nonlinear system whose solution provides a lower bound for energy consumption.
  • Keywords
    CMOS digital integrated circuits; VLSI; circuit CAD; integrated circuit design; low-power electronics; pipeline processing; energy-efficient communication pipeline design; fragmentation technique; latency constraints; lower bound; portable systems; power/energy consumption; system-level pipelines; variable voltage design methodology; voltage setting; Communication systems; Delay; Design methodology; Energy consumption; Energy efficiency; Minimization methods; Operating systems; Parallel processing; Pipelines; Voltage;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2002.800522
  • Filename
    1178077