A VLSI architecture for watermarking in a secure still digital camera (S/sup 2/DC) design

Watermarking is the process that embeds data called a watermark, a tag, or a label into a multimedia object, such as images, video, or text, for their copyright protection. According to human perception, the digital watermarks can be divided into four categories.. A watermark is a secondary translucent image overlaid into the primary image and appears to a viewer on a careful inspection. The in watermark is embedded in such a way that the modifications made to the pixel value is perceptually not noticed, and it can be recovered only with an appropriate decoding mechanism. This paper presents a new very large scale integration (VLSI) architecture for implementing two digital image watermarking schemes. The proposed architecture is designed to aim at easy integration into any existing digital camera framework. To the authors´ knowledge, this is the first VLSI architecture for implementing watermarking schemes. A prototype chip consisting of 28 469 gates is implemented using 0.35-/spl mu/ technology, which consumes 6.9-mW power while operating at 292 MHz.