• DocumentCode
    1145300
  • Title

    Arbitrarily shaped rectilinear module placement using the transitive closure graph representation

  • Author

    Lin, Jai-Ming ; Chen, Hsin-Lung ; Chang, Yao-Wen

  • Author_Institution
    Realtek Semicond. Corp., Hsinchu, Taiwan
  • Volume
    10
  • Issue
    6
  • fYear
    2002
  • Firstpage
    886
  • Lastpage
    901
  • Abstract
    In this paper, we deal with arbitrarily shaped rectilinear module placement using the transitive closure graph (TCG) representation. The geometric meanings of modules are transparent to TCG as well as its induced operations, which makes TCG an ideal representation for floorplanning/placement with arbitrary rectilinear modules. We first partition a rectilinear module into a set of submodules and then derive necessary and sufficient conditions of feasible TCG for the submodules. Unlike most previous works that process each submodule individually and thus need to perform post processing to fix deformed rectilinear modules, our algorithm treats a set of submodules as a whole and thus not only can guarantee the feasibility of each perturbed solution but also can eliminate the need for the postprocessing on deformed modules, implying better solution quality and running time. Experimental results show that our TCG-based algorithm is capable of handling very complex instances; further, it is very efficient and results in better area utilization than previous work.
  • Keywords
    VLSI; circuit layout CAD; graph theory; integrated circuit layout; simulated annealing; VLSI layout; arbitrarily shaped rectilinear module placement; floorplan design algorithm; floorplanning; simulated annealing; submodules; transitive closure graph representation; Algorithm design and analysis; Cost function; Partitioning algorithms; Shape; Silicon; Sufficient conditions; Two dimensional displays;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2002.808431
  • Filename
    1178858