DocumentCode
1147960
Title
A Faster 8-Bit Carry Circuit
Author
Kallman, Ralph
Author_Institution
Department of Mathematical Sciences, Ball State University
Issue
12
fYear
1983
Firstpage
1209
Lastpage
1211
Abstract
A modification of the Chen-Kuck 8-bit carry circuit is presented with one less gate delay and a proof is given that this is the best possible time. The corresponding results for longer length circuits are summarized.
Keywords
Binary addition; combinational circuit synthesis; component counts; computer arithmetic; fast adders; parallel adders; time delays; Adders; Circuit synthesis; Combinational circuits; Coupling circuits; Delay effects; Digital arithmetic; Polynomials; Binary addition; combinational circuit synthesis; component counts; computer arithmetic; fast adders; parallel adders; time delays;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1983.1676188
Filename
1676188
Link To Document