• DocumentCode
    1150959
  • Title

    New directions in semicustom arrays

  • Author

    Beunder, Michiel A. ; Hoefflinger, Bernd ; Kernhof, Juergen P.

  • Author_Institution
    Inst. for Microelectron., Stuttgart, West Germany
  • Volume
    23
  • Issue
    3
  • fYear
    1988
  • fDate
    6/1/1988 12:00:00 AM
  • Firstpage
    728
  • Lastpage
    735
  • Abstract
    The CMOS Gate Forest is such a semicustom array which offers an integration level comparable to that of a full-custom VLSI environment. A hierarchical design approach has become essential in order to be able to handle the complexity of such an implementation environment. Although the Gate Forest is representative of second-generation gate arrays, it also incorporates a number of unique features. The Gate Forest is used to describe the major features of a current semicustom design environment. Partitioning, floorplanning, and mapping operation characteristics are described. Current status of the different parts of the Gate Forest design environment are described.<>
  • Keywords
    CMOS integrated circuits; VLSI; cellular arrays; circuit layout CAD; CMOS Gate Forest; VLSI environment; floorplanning; hierarchical design; integration level; mapping; partitioning; second-generation gate arrays; semicustom arrays; semicustom design environment; unique features; CMOS technology; Character generation; Circuits; Design automation; Logic arrays; Logic gates; Microarchitecture; Microelectronics; Silicon; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.312
  • Filename
    312