• DocumentCode
    1153161
  • Title

    Introduction—Multiple-Valued Logic

  • Author

    Muzio, J.C. ; Rosenerg

  • Author_Institution
    Depnirmnuziop. Cormput. Sci. Univ. Victoria
  • Issue
    2
  • fYear
    1986
  • Firstpage
    97
  • Lastpage
    98
  • Abstract
    MULTIPLE-valued logic has been the object of much research over the last fifteen years. Since 1971, there has been an annual symposium devoted exclusively to the subject and, during that time, nearly 600 papers have appeared in its Proceedings. In addition, a large number of technical papers have appeared elsewhere together with a number of survey articles [1]-[4] and a number of textbooks [5]-[7]. Much of the older work was of a purely theoretical nature concerned with the functional completeness of sets of operators, functional minimization, and similar problems from switching theory and logic design. Work on the hardware implementation of multiple-valued devices has been more recent (see [8] for an early discussion).
  • Keywords
    Analytical models; Circuit testing; Hardware; Integrated circuit interconnections; Logic design; Logic devices; Minimization; Random access memory; Switching circuits; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1986.1676726
  • Filename
    1676726