• DocumentCode
    1153357
  • Title

    An optical interconnection network and a modified snooping protocol for the design of large-scale symmetric multiprocessors (SMPs)

  • Author

    Louri, Ahmed ; Kodi, Avinash Karanth

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
  • Volume
    15
  • Issue
    12
  • fYear
    2004
  • Firstpage
    1093
  • Lastpage
    1104
  • Abstract
    In symmetric multiprocessors (SMPs), the cache coherence overhead and the speed of the shared buses limit the address/snoop bandwidth needed to broadcast transactions to all processors. As a solution, a scalable address subnetwork called symmetric multiprocessor network (SYMNET) is proposed in which address requests and snoop responses of SMPs are implemented optically. SYMNET not only uses passive optical interconnects that increases the speed of the proposed network, but also pipelines address requests at a much faster rate than electronics. This increases the address bandwidth for snooping, but the preservation of cache coherence can no longer be maintained with the usual snooping protocols. A modified coherence protocol, coherence in SYMNET (COSYM), is introduced to solve the coherence problem. COSYM was evaluated with a subset of Splash-2 benchmarks and compared with the electrical bus-based MOESI protocol. The simulation studies have shown a 5-66 percent improvement in execution time for COSYM as compared to MOESI for various applications. Simulations have also shown that the average latency for a transaction to complete using COSYM protocol was 5-78 percent better than the MOESI protocol. It is also seen that SYMNET can scale up to hundreds of processors while still using fast snooping-based cache coherence protocols, and additional performance gains may be attained with further improvement in optical device technology.
  • Keywords
    bandwidth allocation; cache storage; memory protocols; multiprocessing systems; multiprocessor interconnection networks; optical fibre networks; optical interconnections; pipeline processing; system buses; SMP; Splash-2 benchmark; address bandwidth; cache coherence overhead; electrical bus-based MOESI protocol; optical device technology; scalable address subnetwork; snooping-based cache coherence protocol; symmetric multiprocessor; symmetric multiprocessor network; Bandwidth; Broadcasting; Delay; Large-scale systems; Optical design; Optical fiber networks; Optical interconnections; Performance gain; Pipelines; Protocols; 65; SMPs; cache coherence; parallel optical interconnects; scalable optical networks.;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2004.75
  • Filename
    1353242