DocumentCode
1154171
Title
An Algorithm for Optimal Logic Design Using Multiplexers
Author
Pal, Ajit
Author_Institution
Department of Computer Science and Engineering, Indian Institute of Technology
Issue
8
fYear
1986
Firstpage
755
Lastpage
757
Abstract
A set of characterizing parameters, called ratio parameters, has been used to formulate an efficient algorithm for realizing any given Boolean funetion with a single multiplexer of minimum size. The algorithm is applicable to fuctions of a large number of variables because the conventional logic design tools, e.g., Karnaugh map, decomposition chart, etc., which are unsuitable for higher variables, have not been used. The algorithm is also simple in computation, iterative in nature, and very suitable for machine implementation.
Keywords
Characterizing parameters; computer-aided design; logic design; multiplexer realization; reduced functions; Combinational circuits; Design automation; Input variables; Iterative algorithms; Large scale integration; Logic design; Minimization methods; Multiplexing; Programmable logic arrays; Sufficient conditions; Characterizing parameters; computer-aided design; logic design; multiplexer realization; reduced functions;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1986.1676826
Filename
1676826
Link To Document