DocumentCode
1163644
Title
Synthesis of a Class of n-Port Networks
Author
Murti, V.G.K. ; Thulasiraman, K.
Volume
15
Issue
1
fYear
1968
fDate
3/1/1968 12:00:00 AM
Firstpage
54
Lastpage
63
Abstract
The properties of a class of
-node networks, called
-networks, are discussed. The characteristic of a
-network is that when any one of its ports is connected to a voltage source keeping all the other ports short circuited, then all the short-circuited ports are at the same potential. The
-node network with a pair of equal conductances joining any two ports, as obtained by the presently known procedure for the realization of a dominant conductance matrix, is shown to be a special structure belonging to this general class. It is shown that the realization of a real dominant matrix as the short-circuit conductance matrix
of an
-port network can be convenientlycarried out using
-networks. Further, the "modified cut-set matrix" of a
-network is of a special form, independent of edge conductances. This property can be made use of in generating a range of equivalent
-node
-port networks for a given
. Examples illustrating the realization procedures are included.
-node networks, called
-networks, are discussed. The characteristic of a
-network is that when any one of its ports is connected to a voltage source keeping all the other ports short circuited, then all the short-circuited ports are at the same potential. The
-node network with a pair of equal conductances joining any two ports, as obtained by the presently known procedure for the realization of a dominant conductance matrix, is shown to be a special structure belonging to this general class. It is shown that the realization of a real dominant matrix as the short-circuit conductance matrix
of an
-port network can be convenientlycarried out using
-networks. Further, the "modified cut-set matrix" of a
-network is of a special form, independent of edge conductances. This property can be made use of in generating a range of equivalent
-node
-port networks for a given
. Examples illustrating the realization procedures are included.Keywords
Resistive n-ports; k-networks; Admittance; Circuit synthesis; Electric variables measurement; Network synthesis; Voltage;
fLanguage
English
Journal_Title
Circuit Theory, IEEE Transactions on
Publisher
ieee
ISSN
0018-9324
Type
jour
DOI
10.1109/TCT.1968.1082770
Filename
1082770
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