DocumentCode
1170120
Title
A fast multispeed comma-free Reed-Solomon decoder for W-CDMA applications using foldable systolic array architecture
Author
Li, Chi-Fang ; Sheen, Wern-Ho ; Wang, Chong-Ren ; Chu, Yuan-Sun
Author_Institution
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chia-Yi, Taiwan
Volume
38
Issue
4
fYear
2003
fDate
4/1/2003 12:00:00 AM
Firstpage
677
Lastpage
682
Abstract
This brief proposes a fast multispeed comma-free Reed-Solomon (CFRS) decoder for the frame synchronization and code-group identification in the cell search of the Third Generation Partnership Project wide-band code-division multiple access/frequency division duplexing (W-CDMA/FDD) system. A foldable systolic array is proposed to achieve fast decoding and provide flexible tradeoffs between power consumption, chip size, and decoding latency. Multispeed decoding, an idea that is useful for cell search in different application scenarios, can also be achieved with the same array architecture. The proposed CFRS decoder is implemented in a 3.3-V 0.35-μm CMOS technology with 2.2 × 2.2 mm2 core area and power dissipation of 13.3 and 1.23 mW in high- and low-speed decoding modes, respectively.
Keywords
CMOS digital integrated circuits; Reed-Solomon codes; code division multiple access; decoding; systolic arrays; 0.35 micron; 1.23 mW; 13.3 mW; 3.3 V; 3GPP W-CDMA/FDD system; CMOS technology; cell search; code group identification; foldable systolic array architecture; frame synchronization; frequency division duplexing; multispeed comma-free Reed-Solomon decoder; wideband code division multiple access; CMOS technology; Decoding; Delay; Energy consumption; Frequency conversion; Frequency synchronization; Multiaccess communication; Reed-Solomon codes; Systolic arrays; Wideband;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2003.809522
Filename
1190606
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