DocumentCode
1178975
Title
0.1- mu m gate-length superconducting FET
Author
Nishino, T. ; Hatano, M. ; Hasegawa, H. ; Murai, F. ; Kure, T. ; Hiraiwa, A. ; Yagi, K. ; Kawabe, U.
Author_Institution
Hitachi Ltd., Tokyo, Japan
Volume
10
Issue
2
fYear
1989
Firstpage
61
Lastpage
63
Abstract
A superconducting field-effect transistors (FET) with a 0.1- mu m-length gate electrode was fabricated and tested at liquid-helium temperature. Two superconducting electrodes (source and drain) were formed on the same Si substrate surface with an oxide-insulated gate electrode by a self-aligned fabrication process. Superconducting current flowing through the semiconductor (Si) between the two superconducting electrodes (Nb) was controlled by a gate-bias voltage.<>
Keywords
field effect transistors; superconducting junction devices; 0.1 micron; 4.2 K; Nb-Si; Si substrate; gate-bias voltage; gate-length; oxide-insulated gate electrode; self-aligned fabrication; superconducting electrodes; superconducting field-effect transistors; Electrodes; Etching; FETs; Niobium; Semiconductor device doping; Substrates; Superconducting epitaxial layers; Superconducting films; Temperature; Voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.32429
Filename
32429
Link To Document