• DocumentCode
    1185443
  • Title

    Multiple-fault location of analog circuits

  • Author

    Biernacki, Radoslaw M. ; Bandler, John W.

  • Volume
    28
  • Issue
    5
  • fYear
    1981
  • fDate
    5/1/1981 12:00:00 AM
  • Firstpage
    361
  • Lastpage
    367
  • Abstract
    This paper deals with multiple-fault detection for linear analog circuits. The method proposed is based on measurements of voltage using current excitations and has been developed for the location of a number of faults. It utilizes certain algebraic invariants of faulty elements. Computationally, it depends on checking the consistency or inconsistency of suitable sets of linear equations. The equations themselves are formulated via adjoint circuit simulations.
  • Keywords
    Analog and logic circuits analysis; Analog system testing; Linear networks; Analog circuits; Circuit faults; Circuit simulation; Circuit testing; Circuits and systems; Current measurement; Equations; Fault diagnosis; Fault location; Voltage measurement;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1981.1084998
  • Filename
    1084998