Inrush current limiting technique for low-voltage synchronous DC/DC converters

An inrush current limiting technique for low-voltage DC/DC converters is presented and analysed. The proposed circuit overcomes the drawbacks of currently existing techniques in which power semiconductor devices are used in series with the common ground wire. The proposed circuit utilises a n-channel MOSFET at the positive line (uninterrupted ground) and the magnitude of the inrush current is precisely controlled. The requirement for a crow-bar circuit for input isolation is obviated. The presented experimental results are in close agreement with theoretical and simulated predictions.