• DocumentCode
    1187799
  • Title

    Simulation and development environment for mobile 3D graphics architectures

  • Author

    Lee, W.-J. ; Park, W.C. ; Srini, V.P. ; Han, T.D.

  • Author_Institution
    Yonsei Univ., Seoul
  • Volume
    1
  • Issue
    5
  • fYear
    2007
  • Firstpage
    501
  • Lastpage
    507
  • Abstract
    This paper describes a simulation and development environment for designing mobile three-dimensional (3D) graphics architectures. The proposed simulation and verification environment (SVE) uses glTrace´s ability to intercept and redirect an OpenGL|ES streams. The SVE simulates the behaviour of mobile 3D graphics pipeline during the playback of traces and produces the second geometry trace that can be used as a test vector for the Verilog/hardware discription language RT-level model. An architectural verification can be conducted by comparing the frame-by-frame results. The functionality of the SVE is demonstrated by designing a mobile 3D graphics architecture and implementing the verified architecture on field programmable gate array (FPGA) boards. An application development environment (ADE) is also presented that includes a mobile graphics application programming interface and a device driver interface. The proposed SVE and the ADE could be efficiently used for developing and testing mobile applications, architectural analysis and hardware designs.
  • Keywords
    application program interfaces; computer graphic equipment; device drivers; mobile computing; rendering (computer graphics); FPGA; RT-level model; Verilog; application development environment; application programming interface; device driver interface; field programmable gate array; graphics rendering; hardware discription language; mobile 3D graphics architecture; simulation; verification environment;
  • fLanguage
    English
  • Journal_Title
    Computers & Digital Techniques, IET
  • Publisher
    iet
  • ISSN
    1751-8601
  • Type

    jour

  • DOI
    10.1049/iet-cdt:20050205
  • Filename
    4312776