DocumentCode
1190033
Title
The Separation Technique: A Method for Simulating Transistors to Aid Integrated Circuit Design
Author
Angelo, E. James ; Logan, John ; Sussman, Kenneth W.
Author_Institution
IEEE
Issue
2
fYear
1968
Firstpage
113
Lastpage
116
Abstract
Abstract—A new technique that uses the transistor itself as a computing element has been developed for simulating transistors on the analog computer. The method is called the separation technique since it separates the high-and low-frequency behavior of the simulated transistor. The high-frequency behavior of the transistor is time scaled by a factor (typically one million) suitable for computer simulation.
Keywords
Index terms—Analog computer, charge control, integrated circuits, semiconductor device characterization, transistor simulation.; Analog computers; Circuit simulation; Computational modeling; Computer simulation; Design optimization; Integrated circuit synthesis; Laboratories; Logic gates; Programming profession; Telephony; Index terms—Analog computer, charge control, integrated circuits, semiconductor device characterization, transistor simulation.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1968.227398
Filename
1687300
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