Multibit convolution using a bit level systolic array

A novel design for multibit convolver circuits is described. The circuits take the form of systolic arrays of simple one-bit processor and memory cells, with the result that they can operate at very high data rates and should be easy to implement using VLSI technology. An efficient method for handling two´s complement data within the array is described and the relative advantages of this convolver design compared with more conventional circuits is discussed.