DocumentCode
1191648
Title
Class AB regulated cascode current memory cell
Author
Olbrich, T. ; Dorey, A.P.
Volume
30
Issue
22
fYear
1994
fDate
10/27/1994 12:00:00 AM
Firstpage
1821
Lastpage
1822
Abstract
The presented sampled-current memory cell demonstrates class AB operation where the bipolar input current magnitude may exceed twice the quiescent bias current even though full cascode regulation is maintained. Calculation of the necessary safety margin to accommodate process tolerances is shown to be simplified compared with the standard regulated cascode cell
Keywords
bipolar integrated circuits; cascade networks; integrated memory circuits; switched networks; bipolar input current magnitude; class AB operation; class AB regulated cascode current memory cell; full cascode regulation; process tolerances; quiescent bias current; safety margin; sampled-current memory cell;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19941243
Filename
329961
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