DocumentCode
1194922
Title
RNS cellular arrays
Author
Ramnarayan, Raja ; Taylor, Fred J.
Volume
33
Issue
5
fYear
1986
fDate
5/1/1986 12:00:00 AM
Firstpage
526
Lastpage
532
Abstract
The residue number system (RNS) is receiving increased attention due to its ability to support high-speed arithmetic. To convert this body of knowledge into practice, custom VLSI devices will be needed. In this work, procedures by which a set of identical RNS-VLSI chips of small wordlength can be integrated into a wide wordlength system are presented. The mathematical structure of such an interconnected system of RNS adders and multipliers is reported. With these new results, custom VLSI devices may for the first time, impact RNS design.
Keywords
Cellular logic arrays; Residue arithmetic; VLSI; VLSI circuits; Very large-scale integration (VLSI); Arithmetic; Computer architecture; Data processing; Helium; Interconnected systems; Mathematics; Semiconductor memory; Table lookup; Throughput; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/TCS.1986.1085954
Filename
1085954
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