Design techniques for improved capacitor area efficiency in switched-capacitor biquads

The capacitance ratio constraint for equal op-amp dynamic range is derived in this paper for a collection of important biquad configurations of all filter types. This completes the set of explicit design constraints for the determination of capacitance values. The relations between the total capacitance and design parameters such as and peak gain are then transparent to the designer. Computer simulation is no longer a necessity for achieving optimal dynamic range for the biquad. By analyzing a design example of [1], three observations are made with regard to the capacitor area efficiency of a biquad. These observations help the designers to quickly determine the capacitor area efficiencies of available biquad configurations. Different techniques are proposed to improve the capacitor area efficiency of existing biquads. It is shown that simply rearranging the clock phases and input capacitors according to these observations can result in new configurations that improve the total capacitance significantly. Another technique proposed in this paper splits the integrating capacitor of a biquad for different clock phases. In doing so, capacitors unnecessarily linked up with big integrating capacitors can be sealed down and significant saving in total capacitance is achieved. Influence of this technique on the error due to op-amp gain being finite is discussed. Comparisons of the new techniques with the published examples show that 30 to 40-percent savings in total capacitance can be achieved.