DocumentCode
1200578
Title
On Realizability of a Circuit Matrix
Author
Ash, R.B. ; Kim, W.H.
Volume
6
Issue
2
fYear
1959
fDate
6/1/1959 12:00:00 AM
Firstpage
219
Lastpage
223
Abstract
Methods of testing the realizability of a matrix as the circuit matrix of a linear connected graph are presented. Several theorems pertaining to realizability are derived. A systematic synthesis procedure is illustrated for a restricted class of matrices.
Keywords
Circuit testing; Circuit theory; Circuit topology; Inspection; Network theory (graphs); Network topology; Sufficient conditions; System testing; Tellurium; Tree graphs;
fLanguage
English
Journal_Title
Circuit Theory, IRE Transactions on
Publisher
ieee
ISSN
0096-2007
Type
jour
DOI
10.1109/TCT.1959.1086542
Filename
1086542
Link To Document