• DocumentCode
    1200630
  • Title

    Over GHz electrical circuit model of a high-density multiple line grid array (MLGA) interposer

  • Author

    Ahn, Seungyoung ; Lee, Junho ; Lee, Junwoo ; Kim, Jonghoon ; Ryu, Woonghwan ; Kum, Byung-Hun ; Choi, Hyun-Seok ; Yoon, Chong K. ; Kim, Joungho

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Korean Adv. Inst. of Sci. & Technol., Taejon, South Korea
  • Volume
    26
  • Issue
    1
  • fYear
    2003
  • Firstpage
    90
  • Lastpage
    98
  • Abstract
    The multiple line grid array (MLGA) interposer was recently introduced as a future high-density high-speed bonding method. In this paper, we introduce an electrical model and high-frequency characteristics of the MLGA interposer. The high-frequency electrical model was extracted from microwave S-parameter measurements up to 20 GHz as well as from fundamental microwave network analysis. For the parameter fitting process during model extraction, an optimization method was used. Several different types of MLGA interposers were designed, assembled and tested. The test vehicles contained coplanar waveguides, probing pads and an MLGA interposer structure. The height of the MLGA, the conductor shape inside the MLGA, and the dielectric insulator of the MLGA were varied. From the model, an MLGA with a height of 0.4 mm and a polymer dielectric insulator was found to have 203 pH of self inductance, 49 pH of mutual inductance with the nearest ground conductor line, and 186 fF of mutual capacitance. By reducing the height of the MLGA and by using an insulator with a lower dielectric constant, parasitic inductance and capacitance is further reduced. TDR/TDT simulation and measurement showed the validity of the extracted model parameters of the MLGA interposer. Circuit simulation based on the extracted model revealed that the MLGA interposer could be successfully used for microwave device packages up to 20 GHz and for high-speed digital device packages with a clock cycle up to 5 GHz.
  • Keywords
    S-parameters; digital circuits; equivalent circuits; fine-pitch technology; inductance; microwave circuits; modelling; packaging; 0.4 mm; 186 fF; 20 GHz; 5 GHz; CPW; GHz electrical circuit model; HF characteristics; MLGA interposer; TDR/TDT simulation; circuit simulation; conductor shape; coplanar waveguides; high density package; high-density bonding method; high-frequency characteristics; high-speed bonding method; high-speed digital device packages; microwave S-parameter measurements; microwave device packages; model extraction; multiple line grid array; mutual capacitance; mutual inductance; optimization method; parameter fitting process; parasitic capacitance; parasitic inductance; polymer dielectric insulator; probing pads; self inductance; Bonding; Circuit simulation; Conductors; Dielectrics and electrical insulation; Inductance; Microwave measurements; Packaging; Parasitic capacitance; Scattering parameters; Testing;
  • fLanguage
    English
  • Journal_Title
    Advanced Packaging, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-3323
  • Type

    jour

  • DOI
    10.1109/TADVP.2003.811554
  • Filename
    1198947