DocumentCode
1201743
Title
Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning
Author
Park, Chang Seo ; Cho, Byung Jin
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
Volume
26
Issue
11
fYear
2005
Firstpage
796
Lastpage
798
Abstract
High work function (4.9 eV) on high-κ gate dielectric, which is suitable for bulk p-MOSFET, has been achieved using fully silicided (FUSI) PtxSi gate without boron predoping of polysilicon. High concentration of Pt in FUSI PtxSi using Ti capping layer on Pt in the FUSI process is a key to achieving high work function and reduced Fermi-level pinning on high-κ dielectric. By combining with substituted Al (SA) gate for nMOSFET, a wide range of work function difference (0.65 eV) between n and pMOSFETs is demonstrated, without any adverse effects of polysilicon predoping.
Keywords
Fermi level; MOSFET; dielectric materials; platinum alloys; silicon alloys; work function; 4.9 eV; FUSI PtxSi gate; FUSI process; Fermi-level pinning; PtSi; Ti capping layer; fully silicided PtxSi gate; high-k gate dielectric; metal gate; nMOSFET; p-MOSFET; work function; Annealing; Boron; CMOSFETs; Dielectric devices; Dielectric substrates; Doping; Leakage current; MOSFET circuits; Nitrogen; Silicides; High-; metal gate; work function;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2005.857711
Filename
1522458
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